    vs_3_0
    def c18, 1, 0, 0, 0
    dcl_texcoord1 o1
dcl_texcoord2 o2
dcl_texcoord3 o3
dcl_texcoord o0
dcl_position o10
dcl_position v0
    dcl_normal v1
    dcl_texcoord v2
    mul r1.xyz, v1, c16.w
    dp3 r3.w, r1, c5
    dp3 r2.w, r1, c6
    dp3 r0.x, r1, c4
    mov r0.y, r3.w
    mov r0.z, r2.w
    mul r1, r0.xyzz, r0.yzzx
    mov r0.w, c18.x
    dp4 r2.z, r0, c11
    dp4 r2.y, r0, c10
    dp4 r2.x, r0, c9
    mul r0.y, r3.w, r3.w
    mad r0.y, r0.x, r0.x, -r0
    mov o1.x, r0
    dp4 r3.z, r1, c14
    dp4 r3.y, r1, c13
    dp4 r3.x, r1, c12
    mul r1.xyz, r0.y, c15
    add r2.xyz, r2, r3
    dp4 r0.z, v0, c6
    dp4 r0.x, v0, c4
    dp4 r0.y, v0, c5
    add o2.xyz, r2, r1
    mov o1.z, r2.w
    mov o1.y, r3.w
    add o3.xyz, -r0, c8
    mad o0.xy, v2, c17, c17.zwzw
    dp4 o10.w, v0, c3
    dp4 o10.z, v0, c2
    dp4 o10.y, v0, c1
    dp4 o10.x, v0, c0

// approximately 31 instruction slots used
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